一种数字控制CMOS射频功率放大器

Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257) Pub Date : 2001-08-14 DOI:10.1109/MWSCAS.2001.986316

M. Hella, M. Ismail

{"title":"一种数字控制CMOS射频功率放大器","authors":"M. Hella, M. Ismail","doi":"10.1109/MWSCAS.2001.986316","DOIUrl":null,"url":null,"abstract":"This paper presents the design, and implementation of an RF power amplifier in a standard 0.35 /spl mu/m CMOS technology. The amplifier is capable of delivering 16.5 dBm of output power at 1.85 GHz using a 3.3 V supply with an overall measured power added efficiency (PAE) of 30%. The power amplifier employs a class AB output stage, which represents a compromise between efficiency and linearity. Measurement results of the fabricated chip are included.","PeriodicalId":403026,"journal":{"name":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A digitally controlled CMOS RF power amplifier\",\"authors\":\"M. Hella, M. Ismail\",\"doi\":\"10.1109/MWSCAS.2001.986316\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design, and implementation of an RF power amplifier in a standard 0.35 /spl mu/m CMOS technology. The amplifier is capable of delivering 16.5 dBm of output power at 1.85 GHz using a 3.3 V supply with an overall measured power added efficiency (PAE) of 30%. The power amplifier employs a class AB output stage, which represents a compromise between efficiency and linearity. Measurement results of the fabricated chip are included.\",\"PeriodicalId\":403026,\"journal\":{\"name\":\"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-08-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2001.986316\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2001.986316","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 1

摘要

本文介绍了一种标准0.35 /spl mu/m CMOS工艺下射频功率放大器的设计与实现。该放大器能够在1.85 GHz下使用3.3 V电源提供16.5 dBm的输出功率，总体测量功率增加效率(PAE)为30%。功率放大器采用AB类输出级，这代表了效率和线性之间的折衷。最后给出了所制芯片的测量结果。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

A digitally controlled CMOS RF power amplifier

This paper presents the design, and implementation of an RF power amplifier in a standard 0.35 /spl mu/m CMOS technology. The amplifier is capable of delivering 16.5 dBm of output power at 1.85 GHz using a 3.3 V supply with an overall measured power added efficiency (PAE) of 30%. The power amplifier employs a class AB output stage, which represents a compromise between efficiency and linearity. Measurement results of the fabricated chip are included.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)

自引率

0.00%

发文量