{"title":"基于Booksim模拟器的片上网格网络路由算法性能分析","authors":"W. Myung, Zhao Qi, Ma Cheng","doi":"10.1109/ICIASE45644.2019.9074082","DOIUrl":null,"url":null,"abstract":"Network on Chip (NoC) that integrates a large number of nodes in a chip is a competitive candidate to solve the problems of multi-core chip scalability and clock synchronization. Among the many factors that determine the NoC’s performance, the routing algorithms that determine a path from a source node to destination node have a tremendous impact on it. Suitable routing method can greatly improve the performance of NoC. In this paper, we analyze the effect of routing algorithms commonly used in a mesh structure. We compared the data transmission in terms of latency and throughput. Furthermore, we compare which method yielded relatively good results in case of existing a failed node in the network. All results and analysis in the text are derived by using the Booksim simulator. This research proposes the direction of NoC routing algorithms.","PeriodicalId":206741,"journal":{"name":"2019 IEEE International Conference of Intelligent Applied Systems on Engineering (ICIASE)","volume":"219 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Performance Analysis of Routing Algorithms in Mesh Based Network on Chip using Booksim Simulator\",\"authors\":\"W. Myung, Zhao Qi, Ma Cheng\",\"doi\":\"10.1109/ICIASE45644.2019.9074082\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Network on Chip (NoC) that integrates a large number of nodes in a chip is a competitive candidate to solve the problems of multi-core chip scalability and clock synchronization. Among the many factors that determine the NoC’s performance, the routing algorithms that determine a path from a source node to destination node have a tremendous impact on it. Suitable routing method can greatly improve the performance of NoC. In this paper, we analyze the effect of routing algorithms commonly used in a mesh structure. We compared the data transmission in terms of latency and throughput. Furthermore, we compare which method yielded relatively good results in case of existing a failed node in the network. All results and analysis in the text are derived by using the Booksim simulator. This research proposes the direction of NoC routing algorithms.\",\"PeriodicalId\":206741,\"journal\":{\"name\":\"2019 IEEE International Conference of Intelligent Applied Systems on Engineering (ICIASE)\",\"volume\":\"219 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE International Conference of Intelligent Applied Systems on Engineering (ICIASE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICIASE45644.2019.9074082\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE International Conference of Intelligent Applied Systems on Engineering (ICIASE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICIASE45644.2019.9074082","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
摘要
片上网络(Network on Chip, NoC)将大量节点集成在一个芯片上,是解决多核芯片可扩展性和时钟同步问题的有力选择。在决定NoC性能的众多因素中,确定源节点到目标节点路径的路由算法对其影响巨大。合适的路由方法可以大大提高NoC的性能。本文分析了网格结构中常用的路由算法的效果。我们从延迟和吞吐量方面比较了数据传输。此外,我们比较了在网络中存在故障节点的情况下,哪种方法产生相对较好的结果。本文中的所有结果和分析都是使用Booksim模拟器得出的。本研究提出了NoC路由算法的发展方向。
Performance Analysis of Routing Algorithms in Mesh Based Network on Chip using Booksim Simulator
Network on Chip (NoC) that integrates a large number of nodes in a chip is a competitive candidate to solve the problems of multi-core chip scalability and clock synchronization. Among the many factors that determine the NoC’s performance, the routing algorithms that determine a path from a source node to destination node have a tremendous impact on it. Suitable routing method can greatly improve the performance of NoC. In this paper, we analyze the effect of routing algorithms commonly used in a mesh structure. We compared the data transmission in terms of latency and throughput. Furthermore, we compare which method yielded relatively good results in case of existing a failed node in the network. All results and analysis in the text are derived by using the Booksim simulator. This research proposes the direction of NoC routing algorithms.