一种复杂、高可靠性电子系统的测试和诊断方法

S. Pateras, P. McHugh
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引用次数: 7

摘要

定义并描述了一种基于内置自检(BIST)的检测诊断方法。描述了基于可维护系统架构的BIST解决方案,该解决方案包括开发芯片、板和系统BIST所需的技术和工具。该体系结构基于IEEE 1149.5 mtm总线(底板级)和IEEE 1149.1 (JTAG)边界扫描体系结构(芯片级)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
BIST: a test a diagnosis methodology for complex, high reliability electronics systems
A test and diagnosis methodology that is based on built-in self-test(BIST) is defined and described. A BIST solution based on a maintainable system architecture is described that includes the technology, and tools needed for the development of chip, board, and system BIST. This architecture is based on the IEEE 1149.5 MTM-Bus at the backplane level and the IEEE 1149.1 (JTAG) Boundary Scan Architecture at the chip level.
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