三相滤波SVPWM电机驱动

Keng-Yuan Chen, M. Peng, Chyi-Sheng Huang
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引用次数: 0

摘要

在数字实现中,PWM脉冲只能根据系统时钟频率在某些特定的时间瞬间改变开关状态。这种现象导致期望的相电压和实际相电压之间的偏差。虽然在每个载波周期内的偏差很小,但累积误差会导致感性负载产生较大的电流谐波。本文提出了一种用于三相电机驱动的高阶滤波SVPWM来克服这一问题。通过进一步加入带阻滤波器,降低了比谐波分量。两个实验验证了所提调制器的可靠性和适用性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Three-phase filtered SVPWM motor drive
In the digital implementation, PWM pulses can only change switching states at some specific time instants depending on the system clock frequency. This phenomenon results in the deviation between the desired and the produced phase voltages. Although the deviation is small in each carrier period, the accumulated error will result in large current harmonics for inductive load. In this paper, a high-order filtered SVPWM is proposed for the three-phase motor drive to overcome this problem. By further incorporating the band-stop filter, the specific harmonic component is reduced. Two experiments confirm the reliability and applicability of the proposed modulator.
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