{"title":"一种基于片上网络的智能映射工具","authors":"S. Saeidi, A. Khademzadeh, A. Mehran","doi":"10.1109/ISSCS.2007.4292678","DOIUrl":null,"url":null,"abstract":"In the literatures application mapping and task routing has been address as one of the recent open problems in network on chip design[1]. The well performing of these procedures will directly affect the performance and cost measures of NoC design. Some of these measures which we have considered are the total energy consumption, the algorithm complexity. This paper presents the SMAP, a simulation environment, which performs application mapping and task routing for network on chip. Simulation result of the spiral scenario has proven the performance of this tool.","PeriodicalId":225101,"journal":{"name":"2007 International Symposium on Signals, Circuits and Systems","volume":"175 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"31","resultStr":"{\"title\":\"SMAP: An Intelligent Mapping tool for Network on Chip\",\"authors\":\"S. Saeidi, A. Khademzadeh, A. Mehran\",\"doi\":\"10.1109/ISSCS.2007.4292678\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In the literatures application mapping and task routing has been address as one of the recent open problems in network on chip design[1]. The well performing of these procedures will directly affect the performance and cost measures of NoC design. Some of these measures which we have considered are the total energy consumption, the algorithm complexity. This paper presents the SMAP, a simulation environment, which performs application mapping and task routing for network on chip. Simulation result of the spiral scenario has proven the performance of this tool.\",\"PeriodicalId\":225101,\"journal\":{\"name\":\"2007 International Symposium on Signals, Circuits and Systems\",\"volume\":\"175 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-07-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"31\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 International Symposium on Signals, Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCS.2007.4292678\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 International Symposium on Signals, Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCS.2007.4292678","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
SMAP: An Intelligent Mapping tool for Network on Chip
In the literatures application mapping and task routing has been address as one of the recent open problems in network on chip design[1]. The well performing of these procedures will directly affect the performance and cost measures of NoC design. Some of these measures which we have considered are the total energy consumption, the algorithm complexity. This paper presents the SMAP, a simulation environment, which performs application mapping and task routing for network on chip. Simulation result of the spiral scenario has proven the performance of this tool.
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