采用SOI衬底的介质隔离BIMOS工艺中的新型扩散效应

K. Yallup, B. Lane, S. Edwwards
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引用次数: 0

摘要

本文讨论了在厚(5 μ m)薄膜绝缘体硅(SOI)衬底上集成垂直双极器件的大块BIMOS工艺的实现。当在这种工艺中加入沟槽隔离时,可以制造完全介电隔离的器件。通过适当应用沟槽技术,这种处理不会产生电气设备参数的变化。已经证明,外延增厚的ZMR(区域熔化再结晶)和SIMOX(通过注入氧气分离)衬底可以支持广泛的器件,例如在BIMOS工艺中发现的器件。然而,对于电气参数对掺杂剂在硅中的扩散敏感的器件结构,可能需要调整工艺以允许SOI材料的扩散率发生微小变化。这已经在氧化增强扩散的情况下得到了证明。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Novel diffusion effects in a dielectrically isolated BIMOS process using SOI substrates
The implementaton is discussed of a bulk BIMOS process which incorporates vertical bipolar devices on a thick (5 mu m) film silicon-on-insulator (SOI) substrate. When trench isolation is incorporated in such a process, fully dielectrically isolated devices can be fabricated. By appropriate application of the trench technology, no change in the electrical device parameters will be produced by such processing. It has been demonstrated that epitaxially thickened ZMR (zone-melting recrystallization) and SIMOX (separation by implantation of oxygen) substrates can support a wide range of devices such as those found in the BIMOS process. However, for device structures in which electrical parameters are sensitive to the diffusion of dopants in silicon it may be necessary to adjust the process to allow for small changes in diffusivity in SOI material. This has been demonstrated in the case of oxidation enhanced diffusion.<>
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