双n型埋层回跳抑制基极电阻控制晶闸管

2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2019-06-01 DOI:10.1109/EDSSC.2019.8753932

Fei Hu, Limei Song, Zhengsheng Han, Huan Du, Jiajun Luo

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引用次数: 1

摘要

提出了一种新型双n型埋层基极电阻控制晶闸管(DNBL-BRT)。在新结构中，左n埋层引入了一个电子电位陷阱，将电子电流提取到晶闸管中，从而增强了晶闸管的有效触发电流。同时，右n埋层作为空穴势垒将空穴电流推入p基区，抑制了寄生PNP，提高了p基区空穴电流密度。Snapback现象被明显抑制。数值模拟结果表明，当n -埋层掺杂水平为$1.0 \乘以10^{15}$ $\ mathm {c m}^{-3}$，两n -埋层之间的距离为1.5 $\mu$m时，可以实现无回跳，同时保持较高的阻挡能力。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A Snapback Suppressed Base Resistance Controlled Thyristor with Double N-type Buried Layer

A new base resistance controlled thyristor with double N-type buried layer (DNBL-BRT) is proposed in this paper. In the new structure, the left N-buried layer introduces an electron potential trap to extract electron current into thyristor, then effective thyristor trigger current is enhanced. Meanwhile, the right N-buried layer acts as a hole potential barrier to push hole current into P-base region, then parasitic PNP is suppressed and hole current density in P-base region is improved. Snapback phenomenon is significantly suppressed. Numerical simulation results show that, snapback-free can be realized when the doping level of N-buried layers is $1.0 \times 10^{15}$ $\mathrm{c m}^{-3}$and the distance between the two N-buried layers is 1.5 $\mu$m, meanwhile high blocking capability is maintained.

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来源期刊

2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)

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