面向多核处理器研发的基础架构研究

2009 International Conference on Parallel and Distributed Computing, Applications and Technologies Pub Date : 2009-12-08 DOI:10.1109/PDCAT.2009.77

Koh Uehara, Shimpei Sato, T. Miyoshi, Kenji Kise

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引用次数: 13

摘要

在一个芯片上有数千个核的多核处理器将被实现。我们开发了一种基础设施，可以加速多核处理器的研发。本文描述了我们的基础设施提供的三个主要元素。第一个元素是简单多核处理器架构的定义，称为M-Core。第二个是SimMc, M-Core的软件模拟器。第三是软件库MClib，它可以帮助M-Core开发应用程序。利用一些基准程序对SimMc的仿真速度和M-Core的并行化效率进行了评价。我们展示了我们的基础设施加速了多核处理器的研究和开发。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A Study of an Infrastructure for Research and Development of Many-Core Processors

Many-core processors which have thousands of cores on a chip will be realized. We developed an infrastructure which accelerates the research and development of such many-core processors. This paper describes three main elements provided by our infrastructure. The first element is the definition of simple many-core processor architecture called M-Core. The second is SimMc, a software simulator of M-Core. The third is the software library MClib which helps the development of application programs for M-Core. The simulation speed of SimMc and the parallelization efficiency of M-Core are evaluated using some benchmark programs. We show that our infrastructure accelerates the research and development of many-core processors.

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2009 International Conference on Parallel and Distributed Computing, Applications and Technologies

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