Self-checking and fail-safe LSIs by intra-chip redundancy

The paper describes self checking LSIs realized by intra chip redundancy. Self checking comparators within the self checking LSI chips monitor the operation of redundant functional blocks to ensure the functionality of the LSIs. Spatial diversity and time diversity minimize correlated faults among redundant functional blocks, which may reduce fault detection coverage because of coincident faults. This approach allows advantage to be taken of the merits of today's most advanced LSI technologies. That is, higher performance, higher gate density, smaller dimensions, lower power consumption, and lower failure rate, in critical applications. In addition, this approach is well suited to contemporary design automation systems, and can enjoy their merits. The self checking LSIs were developed for experimental purposes and they will be applied to other fault tolerant applications in the future. In addition, the concept of intra chip redundancy is also employed for fail safe LSIs as one technique to ensure their fail safe features. The fail safe LSIs will be applied to train control systems in Japan in the near future.