约瑟夫逊三元存储电路

M. Morisue, J. Endo, T. Morooka, N. Shimizu, M. Sakamoto
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引用次数: 6

摘要

介绍了一种新型的三元逻辑存储电路。本文提出的三元存储电路的原理是基于超导环路中顺时针和逆时针方向的持续循环电流。作为存储器读写操作的门,采用三结SQUID和由两个二结SQUID组合而成的JCTL。为了开发存储电路,我们进行了仿真,确定了最适合存储单元的电路参数,然后基于2 /spl mu/m最小线宽技术制作了该电路。仿真结果表明,该存储电路运行良好,与实验结果吻合较好。该存储电路具有计算速度快、功耗低、结构简单、元件数量少等优点。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Josephson ternary memory circuit
A novel ternary logic memory circuit using Josephson junctions is described. The principle of the ternary memory circuit proposed here is based on the persistent circulating current in the superconducting loop in the clockwise and the counter clockwise directions. As the gate for writing and reading operation of the memory, the three-junction SQUID and the JCTL which is constructed by combination of two two-junction SQUIDs are used. In order to develop the memory circuit, we have made the simulations to determine the most suitable circuit parameters to the memory cell and then fabricated the circuit based on 2 /spl mu/m minimum line width technology. The simulation results show satisfactory operations of the memory circuit, which agree well with the experiment results. The advantages of the proposed memory circuit are capability of high speed computation, low power consumption and very simple construction with less number of elements due to the ternary operation.
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