A Topology-based Decomposition Approach for Time-Triggered Message Scheduling in Network-on-chip

Distributed tasks can be performed on multi-core DSPs or IP cores embedded within a chip as the rapid development of microelectronics. Periodic messages can be transmitted in Network-on-Chip (NoC) across multi-hops in a time-triggered mode. To schedule time-triggered messages between tasks, a topology-based decomposition approach (TBDA) based on Satisfiability Modulo Theories (SMT) solver was presented, which decomposes topology structure into several regions and groups messages according to inter-regional messages and intra-regional messages. The TBDA assigns inter-regional message flows with time intervals firstly, and then generates timetable for intra-regional message flows within each region with backtracking operations on the condition that some messages are not schedulable. The TBDA reduces the solution time of pure SMT solver by decreasing the computational complexity. A tasks allocation method was addressed to reduce inter-regional messages while minimizing the communication amount of all messages. The results from programming analysis and from simulations by NIRGAM simulator show the feasibility and efficiency of TBDA along with a certain comparative case study.