OFDM接收机中基于CORDIC算法的2K/4K/ 8k点FFT处理器设计

2001 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (IEEE Cat. No.01CH37233) Pub Date : 2001-08-26 DOI:10.1109/PACRIM.2001.953668

S. Park, N. Cho, Sang Uk Lee, Kichul Kim, Jisung Oh

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引用次数: 23

摘要

介绍了一种用于OFDM系统的2K/4K/ 8k点复快速傅里叶变换(FFT)处理器的结构和实现。该处理器可以在30mhz下每273 /spl mu/s执行8k点FFT，每68.26 /spl mu/s执行2k点FFT，足以满足OFDM符号速率。该架构基于Cooley-Tukey(1965)算法，将长DFT分解为短长度的多维DFT。变换存储器和洗牌存储器用于实现多维变换。采用CORDIC处理器处理各维的中间因子乘法。为了节省存储转子因子所需的ROM空间，提出了一种新的转子因子生成方法。

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Design of 2K/4K/8K-point FFT processor based on CORDIC algorithm in OFDM receiver

The architecture and the implementation of a 2K/4K/8K-point complex fast Fourier transform (FFT) processor for an OFDM system are presented. The processor can perform 8K-point FFT every 273 /spl mu/s, and 2K-point every 68.26 /spl mu/s at 30 MHz which is enough for the OFDM symbol rate. The architecture is based on the Cooley-Tukey (1965) algorithm for decomposing the long DFT into short length multi-dimensional DFTs. The transposition and shuffle memories are used for the implementation of multi-dimensional transforms. The CORDIC processor is employed for the twiddle factor multiplications in each dimension. A new twiddle factor generation method is also proposed for saving the size of ROM required for storing the twiddle factors.

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来源期刊

2001 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (IEEE Cat. No.01CH37233)

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