协同设计工具中低功耗架构的自动探索

P. Guitton-Ouhamou, C. Belleudy, M. Auguin
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引用次数: 0

摘要

能耗是嵌入式系统设计中的一个热点问题。随着移动计算系统(摄像机、手机等)的普及,如何延长这些系统的电池寿命成为一个关键问题。此外,嵌入式系统设计是最具挑战性的任务之一,因为新的和各种各样的应用程序越来越复杂,并且需要满足各种各样的约束(更低的成本,更高的性能,更低的能耗)。本文主要研究硬件/软件协同设计工具的低能耗约束。我们的目标是在系统性能和能耗之间达到最佳平衡。对于硬件和软件单元(DSP, RISC处理器),我们开发了能耗模型和方法来评估所设计系统的能耗。然后,为了减少这种能量,我们在分配和调度步骤中引入了优化。实验结果表明,这种方法是有前途的,它提供了50%的节能架构。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Automatical exploration of low power architecture in co-design tool
Energy consumption is a hot topic in the design of embedded systems. As mobile computing system (video camera, cellular phone, etc.) becomes more popular, how to lengthen the battery life of these systems becomes a critical issue. Also embedded system design is one of the most challenging tasks because the increasing complexity of new and various applications and the great variety of constraints to meet (lower cost, higher performance, lower energy). In this paper, we focus on the constraint of low energy consumption in hardware/software codesign tool. Our goal is to reach the best trade-off between system performance and energy consumption. For hardware and software units (DSP, RISC processors), we have developed a model of energy consumption and the methodology to evaluate the energy consumption of the designed systems. Then to reduce this energy, we introduce optimizations in allocation and scheduling steps. Experimental results show that this approach is promising and that it provides architectures with an energy saving of 50%.
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