{"title":"为特定于应用程序的体系结构定制控制器指令集","authors":"Jian Li, David Dickin, Lesley Shannon","doi":"10.1109/ASAP.2010.5540965","DOIUrl":null,"url":null,"abstract":"Previous work has proposed the \"Systems Integrating Modules with Predefined Physical Links\" (SIMPPL) architectural framework as one possible method to shorten the design cycle by utilizing a light weight programmable controller (SIMPPL Controller) as the system-level interface. This paper presents a study of how much improvement in area, power, and performance can be achieved through the customization of the SIMPPL Controller's instruction set. Furthermore, we have created a tool to automatically generate the HDL for SIMPPL Controllers with a user specified instruction set. Our study on an FPGA platform has shown that using a customized SIMPPL Controller with a minimal instruction set results in: an area reduction of 42%, a performance increase of 16%, and a power reduction of 10%.","PeriodicalId":175846,"journal":{"name":"ASAP 2010 - 21st IEEE International Conference on Application-specific Systems, Architectures and Processors","volume":"88 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Customizing controller instruction sets for application-specific architectures\",\"authors\":\"Jian Li, David Dickin, Lesley Shannon\",\"doi\":\"10.1109/ASAP.2010.5540965\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Previous work has proposed the \\\"Systems Integrating Modules with Predefined Physical Links\\\" (SIMPPL) architectural framework as one possible method to shorten the design cycle by utilizing a light weight programmable controller (SIMPPL Controller) as the system-level interface. This paper presents a study of how much improvement in area, power, and performance can be achieved through the customization of the SIMPPL Controller's instruction set. Furthermore, we have created a tool to automatically generate the HDL for SIMPPL Controllers with a user specified instruction set. Our study on an FPGA platform has shown that using a customized SIMPPL Controller with a minimal instruction set results in: an area reduction of 42%, a performance increase of 16%, and a power reduction of 10%.\",\"PeriodicalId\":175846,\"journal\":{\"name\":\"ASAP 2010 - 21st IEEE International Conference on Application-specific Systems, Architectures and Processors\",\"volume\":\"88 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-07-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ASAP 2010 - 21st IEEE International Conference on Application-specific Systems, Architectures and Processors\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASAP.2010.5540965\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ASAP 2010 - 21st IEEE International Conference on Application-specific Systems, Architectures and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASAP.2010.5540965","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Customizing controller instruction sets for application-specific architectures
Previous work has proposed the "Systems Integrating Modules with Predefined Physical Links" (SIMPPL) architectural framework as one possible method to shorten the design cycle by utilizing a light weight programmable controller (SIMPPL Controller) as the system-level interface. This paper presents a study of how much improvement in area, power, and performance can be achieved through the customization of the SIMPPL Controller's instruction set. Furthermore, we have created a tool to automatically generate the HDL for SIMPPL Controllers with a user specified instruction set. Our study on an FPGA platform has shown that using a customized SIMPPL Controller with a minimal instruction set results in: an area reduction of 42%, a performance increase of 16%, and a power reduction of 10%.