{"title":"一种有效用于迭代模乘法的基数-4模乘法硬件算法","authors":"N. Takagi","doi":"10.1109/ARITH.1991.145531","DOIUrl":null,"url":null,"abstract":"A fast radix-4 modular multiplication hardware algorithm is proposed. It is efficient especially in applications, such as encryption/decryption in the RSA cryptosystem, where modular multiplications are carried out iteratively. Each subtraction for the division for residue calculation is embedded in the repeated multiply-addition. Numbers are represented in a redundant representation and addition/subtractions are performed without carry propagation. A serial-parallel modular multiplier based on the algorithm has a regular cellular array structure with a bit slice feature suitable for VLSI implementation.<<ETX>>","PeriodicalId":190650,"journal":{"name":"[1991] Proceedings 10th IEEE Symposium on Computer Arithmetic","volume":"231 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":"{\"title\":\"A radix-4 modular multiplication hardware algorithm efficient for iterative modular multiplications\",\"authors\":\"N. Takagi\",\"doi\":\"10.1109/ARITH.1991.145531\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A fast radix-4 modular multiplication hardware algorithm is proposed. It is efficient especially in applications, such as encryption/decryption in the RSA cryptosystem, where modular multiplications are carried out iteratively. Each subtraction for the division for residue calculation is embedded in the repeated multiply-addition. Numbers are represented in a redundant representation and addition/subtractions are performed without carry propagation. A serial-parallel modular multiplier based on the algorithm has a regular cellular array structure with a bit slice feature suitable for VLSI implementation.<<ETX>>\",\"PeriodicalId\":190650,\"journal\":{\"name\":\"[1991] Proceedings 10th IEEE Symposium on Computer Arithmetic\",\"volume\":\"231 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-06-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991] Proceedings 10th IEEE Symposium on Computer Arithmetic\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ARITH.1991.145531\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991] Proceedings 10th IEEE Symposium on Computer Arithmetic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ARITH.1991.145531","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A radix-4 modular multiplication hardware algorithm efficient for iterative modular multiplications
A fast radix-4 modular multiplication hardware algorithm is proposed. It is efficient especially in applications, such as encryption/decryption in the RSA cryptosystem, where modular multiplications are carried out iteratively. Each subtraction for the division for residue calculation is embedded in the repeated multiply-addition. Numbers are represented in a redundant representation and addition/subtractions are performed without carry propagation. A serial-parallel modular multiplier based on the algorithm has a regular cellular array structure with a bit slice feature suitable for VLSI implementation.<>
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