计数器寄存器的设计

Ferdynand Wagner
{"title":"计数器寄存器的设计","authors":"Ferdynand Wagner","doi":"10.1049/IJ-CDT.1979.0015","DOIUrl":null,"url":null,"abstract":"The paper describes a method of designing counter registers. Two important features of the method are that it produces a minimal design and that it is guaranteed to avoid jamming. The method may be applied to the synthesis of any counter registers used, for example, as binary-sequence generators, word generators, counters, pseudorandom binary-sequence generators etc. The paper contains examples which demonstrate the design procedure, and gives some results relating to minimal counter registers.","PeriodicalId":344610,"journal":{"name":"Iee Journal on Computers and Digital Techniques","volume":"76 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1979-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design of counter registers\",\"authors\":\"Ferdynand Wagner\",\"doi\":\"10.1049/IJ-CDT.1979.0015\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper describes a method of designing counter registers. Two important features of the method are that it produces a minimal design and that it is guaranteed to avoid jamming. The method may be applied to the synthesis of any counter registers used, for example, as binary-sequence generators, word generators, counters, pseudorandom binary-sequence generators etc. The paper contains examples which demonstrate the design procedure, and gives some results relating to minimal counter registers.\",\"PeriodicalId\":344610,\"journal\":{\"name\":\"Iee Journal on Computers and Digital Techniques\",\"volume\":\"76 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1979-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Iee Journal on Computers and Digital Techniques\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1049/IJ-CDT.1979.0015\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Iee Journal on Computers and Digital Techniques","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1049/IJ-CDT.1979.0015","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

本文介绍了一种计数器寄存器的设计方法。该方法的两个重要特点是,它产生了一个最小的设计,并保证避免干扰。该方法可应用于所使用的任何计数器寄存器的合成,例如,作为二进制序列生成器、字生成器、计数器、伪随机二进制序列生成器等。文中举例说明了设计过程,并给出了有关最小计数器寄存器的一些结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design of counter registers
The paper describes a method of designing counter registers. Two important features of the method are that it produces a minimal design and that it is guaranteed to avoid jamming. The method may be applied to the synthesis of any counter registers used, for example, as binary-sequence generators, word generators, counters, pseudorandom binary-sequence generators etc. The paper contains examples which demonstrate the design procedure, and gives some results relating to minimal counter registers.
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