单片容错VLSI微处理器的设计考虑

A. Goode
{"title":"单片容错VLSI微处理器的设计考虑","authors":"A. Goode","doi":"10.1049/sm.1985.0016","DOIUrl":null,"url":null,"abstract":"A design approach is presented for a general-purpose VLSI fault tolerant microprocessor, with redundancy designed into the internal chip architecture. The design features are internal automatic state storage and rollback/retry mechanism and a microprogrammed ALU design. The reliability of the design is estimated using a system model of reliability behaviour, and is compared with that of other fault tolerant design strategies. Finally, the effect of the fault tolerance on processor performance is discussed.","PeriodicalId":246116,"journal":{"name":"Softw. Microsystems","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1985-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Design considerations for a single-chip fault tolerant VLSI microprocessor\",\"authors\":\"A. Goode\",\"doi\":\"10.1049/sm.1985.0016\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A design approach is presented for a general-purpose VLSI fault tolerant microprocessor, with redundancy designed into the internal chip architecture. The design features are internal automatic state storage and rollback/retry mechanism and a microprogrammed ALU design. The reliability of the design is estimated using a system model of reliability behaviour, and is compared with that of other fault tolerant design strategies. Finally, the effect of the fault tolerance on processor performance is discussed.\",\"PeriodicalId\":246116,\"journal\":{\"name\":\"Softw. Microsystems\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1985-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Softw. Microsystems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1049/sm.1985.0016\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Softw. Microsystems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1049/sm.1985.0016","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

提出了一种通用的超大规模集成电路容错微处理器的设计方法,并将冗余设计到芯片内部结构中。设计特点是内部自动状态存储和回滚/重试机制以及微编程ALU设计。利用可靠性行为的系统模型估计了设计的可靠性,并与其他容错设计策略进行了比较。最后,讨论了容错对处理器性能的影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design considerations for a single-chip fault tolerant VLSI microprocessor
A design approach is presented for a general-purpose VLSI fault tolerant microprocessor, with redundancy designed into the internal chip architecture. The design features are internal automatic state storage and rollback/retry mechanism and a microprogrammed ALU design. The reliability of the design is estimated using a system model of reliability behaviour, and is compared with that of other fault tolerant design strategies. Finally, the effect of the fault tolerance on processor performance is discussed.
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