J. Muldavin, C. Bozler, D. Yost, C. Chen, P. Wyatt
{"title":"用于MEMS和先进封装的SOI","authors":"J. Muldavin, C. Bozler, D. Yost, C. Chen, P. Wyatt","doi":"10.1109/SOI.2012.6404402","DOIUrl":null,"url":null,"abstract":"Silicon on Insulator (SOI) Technologies offer many advantages for the fabrication and advanced packaging of MEMS and IC devices and systems. The buried oxide provides an excellent etch stop and the silicon layers on top can be selected for the exact thickness, crystal orientation, and purity for the required application. These properties are exploited for the fabrication and packaging of MEMS devices as well as for 3D integration of SOI CMOS and flexible electronics. Particular examples from work done at MIT Lincoln Laboratory over the last 10 years will be included.","PeriodicalId":306839,"journal":{"name":"2012 IEEE International SOI Conference (SOI)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"SOI for MEMS and advanced packaging\",\"authors\":\"J. Muldavin, C. Bozler, D. Yost, C. Chen, P. Wyatt\",\"doi\":\"10.1109/SOI.2012.6404402\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Silicon on Insulator (SOI) Technologies offer many advantages for the fabrication and advanced packaging of MEMS and IC devices and systems. The buried oxide provides an excellent etch stop and the silicon layers on top can be selected for the exact thickness, crystal orientation, and purity for the required application. These properties are exploited for the fabrication and packaging of MEMS devices as well as for 3D integration of SOI CMOS and flexible electronics. Particular examples from work done at MIT Lincoln Laboratory over the last 10 years will be included.\",\"PeriodicalId\":306839,\"journal\":{\"name\":\"2012 IEEE International SOI Conference (SOI)\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE International SOI Conference (SOI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOI.2012.6404402\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International SOI Conference (SOI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.2012.6404402","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Silicon on Insulator (SOI) Technologies offer many advantages for the fabrication and advanced packaging of MEMS and IC devices and systems. The buried oxide provides an excellent etch stop and the silicon layers on top can be selected for the exact thickness, crystal orientation, and purity for the required application. These properties are exploited for the fabrication and packaging of MEMS devices as well as for 3D integration of SOI CMOS and flexible electronics. Particular examples from work done at MIT Lincoln Laboratory over the last 10 years will be included.
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