{"title":"0.18 um CMOS口袋植入参数的研究","authors":"J. Schmitz, Y. Ponomarev, A. Montree, P. Woerlee","doi":"10.1109/ESSDERC.1997.194406","DOIUrl":null,"url":null,"abstract":"PMOS and NMOS transistors for the 0.18 μm CMOS generation with pocket punch-through stoppers are presented. A detailed study of the dose and angle of the pocket implants is presented, showing that these implant conditions do not affect the long-channel S and VT, nor the substrate current. A clear optimum is found when threshold voltage rolloff and subthreshold swing are evaluated, leading to the best performance in terms of Ion/Ioff ratio.","PeriodicalId":424167,"journal":{"name":"27th European Solid-State Device Research Conference","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Study of pocket implant parameters for 0,18 um CMOS\",\"authors\":\"J. Schmitz, Y. Ponomarev, A. Montree, P. Woerlee\",\"doi\":\"10.1109/ESSDERC.1997.194406\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"PMOS and NMOS transistors for the 0.18 μm CMOS generation with pocket punch-through stoppers are presented. A detailed study of the dose and angle of the pocket implants is presented, showing that these implant conditions do not affect the long-channel S and VT, nor the substrate current. A clear optimum is found when threshold voltage rolloff and subthreshold swing are evaluated, leading to the best performance in terms of Ion/Ioff ratio.\",\"PeriodicalId\":424167,\"journal\":{\"name\":\"27th European Solid-State Device Research Conference\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-09-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"27th European Solid-State Device Research Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSDERC.1997.194406\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"27th European Solid-State Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDERC.1997.194406","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Study of pocket implant parameters for 0,18 um CMOS
PMOS and NMOS transistors for the 0.18 μm CMOS generation with pocket punch-through stoppers are presented. A detailed study of the dose and angle of the pocket implants is presented, showing that these implant conditions do not affect the long-channel S and VT, nor the substrate current. A clear optimum is found when threshold voltage rolloff and subthreshold swing are evaluated, leading to the best performance in terms of Ion/Ioff ratio.