III-V / Si杂化MOS电容器调制器的栅氧化工艺

2019 IEEE 16th International Conference on Group IV Photonics (GFP) Pub Date : 2019-08-01 DOI:10.1109/GROUP4.2019.8853953

Y. Désières, K. Hassan, S. Malhouitre, V. Muffato, V. Ramez

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引用次数: 1

摘要

光子集成电路的发展需要高性能的光子器件，包括相位调制器。电容式相位调制器具有高效率和低功耗的特点，但代价是其集成在pic中的技术挑战。本文介绍了用于MOSCAP调制器制造的薄栅氧化物的200mm晶圆工艺流程。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Gate Oxide Process for III-V / Si Hybrid MOS Capacitor Modulator

Progresses in Photonic Integrated Circuits (PICs) demand development of high performance photonic devices, including phase modulators. Capacitive phase modulators present high efficiency and low consumption, at the cost of technical challenges for their integration in PICs. A 200mm wafer process flow for thin gate oxide employed for MOSCAP modulators fabrication is presented here.

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2019 IEEE 16th International Conference on Group IV Photonics (GFP)

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