{"title":"基于0.18µm CMOS工艺技术的交叉耦合整流器设计与改进","authors":"Irawan Sukma, I. Supono","doi":"10.1109/ICRAMET51080.2020.9298670","DOIUrl":null,"url":null,"abstract":"The rectifier is one of parts from receiver circuit used for wireless power transfer (WPT) and energy harvesting (EH) application, so improving the efficiency of rectifier is a critical point for WPT and EH application. The previous research of cross-coupled inverter (CCI) rectifier used 0.35 µm CMOS process technology. It showed the highest power conversion efficiency (PCE) achieved 60% when 100 kOhm load, 0.7 V voltage input and 13.56 MHz RFID frequency input. This paper uses CCI rectifier circuit design with 0.18 µm CMOS process technology for improving voltage output. The result shows PCE 0.18 µm higher than 0.35 µm CCI rectifier with 0.4 mW of maximum power output and 93.30%, when it uses load 2 kOhm, 300 kHz frequency input and ideal voltage source. It occurred because 0.18 µm CCI rectifier has lower leakage current drain to source (Ids) of MOSFET. In addition, the internal resistance voltage source from 1 to 100 Ohm can decrease efficiency of CCI rectifier from 86% to 79%. The result of voltage co version efficiency is slightly raised from 95% to 99%, with maximum voltage output of 3.28 V on load over than 1 kOhm.","PeriodicalId":228482,"journal":{"name":"2020 International Conference on Radar, Antenna, Microwave, Electronics, and Telecommunications (ICRAMET)","volume":"206 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design and Improvement of Cross-Coupled Rectifier Using 0.18 µm CMOS Process Technology\",\"authors\":\"Irawan Sukma, I. Supono\",\"doi\":\"10.1109/ICRAMET51080.2020.9298670\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The rectifier is one of parts from receiver circuit used for wireless power transfer (WPT) and energy harvesting (EH) application, so improving the efficiency of rectifier is a critical point for WPT and EH application. The previous research of cross-coupled inverter (CCI) rectifier used 0.35 µm CMOS process technology. It showed the highest power conversion efficiency (PCE) achieved 60% when 100 kOhm load, 0.7 V voltage input and 13.56 MHz RFID frequency input. This paper uses CCI rectifier circuit design with 0.18 µm CMOS process technology for improving voltage output. The result shows PCE 0.18 µm higher than 0.35 µm CCI rectifier with 0.4 mW of maximum power output and 93.30%, when it uses load 2 kOhm, 300 kHz frequency input and ideal voltage source. It occurred because 0.18 µm CCI rectifier has lower leakage current drain to source (Ids) of MOSFET. In addition, the internal resistance voltage source from 1 to 100 Ohm can decrease efficiency of CCI rectifier from 86% to 79%. The result of voltage co version efficiency is slightly raised from 95% to 99%, with maximum voltage output of 3.28 V on load over than 1 kOhm.\",\"PeriodicalId\":228482,\"journal\":{\"name\":\"2020 International Conference on Radar, Antenna, Microwave, Electronics, and Telecommunications (ICRAMET)\",\"volume\":\"206 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-11-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 International Conference on Radar, Antenna, Microwave, Electronics, and Telecommunications (ICRAMET)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICRAMET51080.2020.9298670\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International Conference on Radar, Antenna, Microwave, Electronics, and Telecommunications (ICRAMET)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICRAMET51080.2020.9298670","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design and Improvement of Cross-Coupled Rectifier Using 0.18 µm CMOS Process Technology
The rectifier is one of parts from receiver circuit used for wireless power transfer (WPT) and energy harvesting (EH) application, so improving the efficiency of rectifier is a critical point for WPT and EH application. The previous research of cross-coupled inverter (CCI) rectifier used 0.35 µm CMOS process technology. It showed the highest power conversion efficiency (PCE) achieved 60% when 100 kOhm load, 0.7 V voltage input and 13.56 MHz RFID frequency input. This paper uses CCI rectifier circuit design with 0.18 µm CMOS process technology for improving voltage output. The result shows PCE 0.18 µm higher than 0.35 µm CCI rectifier with 0.4 mW of maximum power output and 93.30%, when it uses load 2 kOhm, 300 kHz frequency input and ideal voltage source. It occurred because 0.18 µm CCI rectifier has lower leakage current drain to source (Ids) of MOSFET. In addition, the internal resistance voltage source from 1 to 100 Ohm can decrease efficiency of CCI rectifier from 86% to 79%. The result of voltage co version efficiency is slightly raised from 95% to 99%, with maximum voltage output of 3.28 V on load over than 1 kOhm.