{"title":"电力电子封装和微型化使用芯片级封装功率器件","authors":"Xingsheng Liu, G. Lu","doi":"10.1109/IPEMC.2000.885365","DOIUrl":null,"url":null,"abstract":"The authors present a power electronics packaging technology utilizing chip-scale packaged (CSP) power devices to build three-dimensional integrated power electronics modules (IPEMs). The chip-scale packaging structure, termed Die Dimensional Ball Grid Array (D/sup 2/BGA), eliminates wire bonds by using stacked solder bumps to interconnect power chips. It has the same lateral dimensions as the starting power chip, which makes high-density packaging and module miniaturisation possible. This package enables the power chip to combine excellent thermal transfer, high current handling capability, improved electrical characteristics, and ultra-low profile packaging. In this paper, the authors introduce the D/sup 2/BGA power chip-scale package, and present the implementation of these chip-scale packaged power devices in building 30 kW half-bridge power converter modules. The electrical and reliability test results of the packaged devices and the power modules are reported.","PeriodicalId":373820,"journal":{"name":"Proceedings IPEMC 2000. Third International Power Electronics and Motion Control Conference (IEEE Cat. No.00EX435)","volume":"50 3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Power electronics packaging and miniature using chip-scale packaged power devices\",\"authors\":\"Xingsheng Liu, G. Lu\",\"doi\":\"10.1109/IPEMC.2000.885365\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors present a power electronics packaging technology utilizing chip-scale packaged (CSP) power devices to build three-dimensional integrated power electronics modules (IPEMs). The chip-scale packaging structure, termed Die Dimensional Ball Grid Array (D/sup 2/BGA), eliminates wire bonds by using stacked solder bumps to interconnect power chips. It has the same lateral dimensions as the starting power chip, which makes high-density packaging and module miniaturisation possible. This package enables the power chip to combine excellent thermal transfer, high current handling capability, improved electrical characteristics, and ultra-low profile packaging. In this paper, the authors introduce the D/sup 2/BGA power chip-scale package, and present the implementation of these chip-scale packaged power devices in building 30 kW half-bridge power converter modules. The electrical and reliability test results of the packaged devices and the power modules are reported.\",\"PeriodicalId\":373820,\"journal\":{\"name\":\"Proceedings IPEMC 2000. Third International Power Electronics and Motion Control Conference (IEEE Cat. No.00EX435)\",\"volume\":\"50 3\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-08-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings IPEMC 2000. Third International Power Electronics and Motion Control Conference (IEEE Cat. No.00EX435)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPEMC.2000.885365\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings IPEMC 2000. Third International Power Electronics and Motion Control Conference (IEEE Cat. No.00EX435)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPEMC.2000.885365","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Power electronics packaging and miniature using chip-scale packaged power devices
The authors present a power electronics packaging technology utilizing chip-scale packaged (CSP) power devices to build three-dimensional integrated power electronics modules (IPEMs). The chip-scale packaging structure, termed Die Dimensional Ball Grid Array (D/sup 2/BGA), eliminates wire bonds by using stacked solder bumps to interconnect power chips. It has the same lateral dimensions as the starting power chip, which makes high-density packaging and module miniaturisation possible. This package enables the power chip to combine excellent thermal transfer, high current handling capability, improved electrical characteristics, and ultra-low profile packaging. In this paper, the authors introduce the D/sup 2/BGA power chip-scale package, and present the implementation of these chip-scale packaged power devices in building 30 kW half-bridge power converter modules. The electrical and reliability test results of the packaged devices and the power modules are reported.