{"title":"用于验证自动化的功能抽象语言","authors":"Zhao Lv, Shuming Chen, Yaohua Wang","doi":"10.1109/ICAM.2017.8242181","DOIUrl":null,"url":null,"abstract":"Functional verification is one of the key problems hindering successful design of large and complex hardware. As the base of functional verification, summary and decomposition of function points are leak-prone due to lack of standard language to abstract function points from specification. In this paper, we propose a function abstraction language, FAL, which is used for describing function points from specification. Besides, we develop a corresponding compiler, which can automatically generate the corresponding verification platform given any FAL description. The auto-generated verification platform can generate efficient test sequences, check the properties of function points and record the simulation information and coverage report. The experimental results show that compared with the random test generation, the procedure convergence of our proposal is much faster. In addition, compared with the manual work, the proposed automatic verification framework can lead to 46.6% reduction of time on average in building verification platform.","PeriodicalId":117801,"journal":{"name":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"FAL: A function abstraction language for verification automation\",\"authors\":\"Zhao Lv, Shuming Chen, Yaohua Wang\",\"doi\":\"10.1109/ICAM.2017.8242181\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Functional verification is one of the key problems hindering successful design of large and complex hardware. As the base of functional verification, summary and decomposition of function points are leak-prone due to lack of standard language to abstract function points from specification. In this paper, we propose a function abstraction language, FAL, which is used for describing function points from specification. Besides, we develop a corresponding compiler, which can automatically generate the corresponding verification platform given any FAL description. The auto-generated verification platform can generate efficient test sequences, check the properties of function points and record the simulation information and coverage report. The experimental results show that compared with the random test generation, the procedure convergence of our proposal is much faster. In addition, compared with the manual work, the proposed automatic verification framework can lead to 46.6% reduction of time on average in building verification platform.\",\"PeriodicalId\":117801,\"journal\":{\"name\":\"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)\",\"volume\":\"37 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICAM.2017.8242181\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICAM.2017.8242181","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
FAL: A function abstraction language for verification automation
Functional verification is one of the key problems hindering successful design of large and complex hardware. As the base of functional verification, summary and decomposition of function points are leak-prone due to lack of standard language to abstract function points from specification. In this paper, we propose a function abstraction language, FAL, which is used for describing function points from specification. Besides, we develop a corresponding compiler, which can automatically generate the corresponding verification platform given any FAL description. The auto-generated verification platform can generate efficient test sequences, check the properties of function points and record the simulation information and coverage report. The experimental results show that compared with the random test generation, the procedure convergence of our proposal is much faster. In addition, compared with the manual work, the proposed automatic verification framework can lead to 46.6% reduction of time on average in building verification platform.