Near-Native Interrupt Latency in Real-Time Guests: Handler Emulation Through Memory Map Morphing

Interrupt latency, critical in real-time applications, is increased in virtualized systems; interrupts intended for a non-running partition can be delayed up to the length of the scheduling period. State-of-the art techniques for decreasing latency in real-time guests relax temporal isolation requirements, allowing guests’ interrupt handlers to be executed within another partition’s time slot. However, this approach does not yet achieve native latencies, due to the need to switch guests’ contexts, inducing overhead for Hypervisor execution. This paper presents an approach for reducing interrupt latencies: by taking advantage of virtualization support hardware in modern microprocessors, we show that real-time guests’ interrupt handlers can be executed within Hypervisor hardware context, i.e., by Hypervisor-dedicated processor hardware, eliminating the need for switching guests’ context and approaching native latencies. This is achieved by morphing the Hypervisor’s memory map translation mechanisms, so software is executed within the real-time guest’s memory context, allowing near-native interrupt latency. We evaluate our implementation, consisting of virtualization hardware and software, on a softcore ARM processor prototyped on a Xilinx Virtex 5 FPGA, running Linux and FreeRTOS. Results show memory map morphing is capable of achieving near-native interrupt latency for a real-time guest, outperforming the state of the art.