{"title":"90nm FPGA的数据残留分析","authors":"Tim Tuan, T. Strader, S. Trimberger","doi":"10.1109/CICC.2007.4405689","DOIUrl":null,"url":null,"abstract":"FPGAs are increasingly used in military applications, the security of a design when the part is powered off is an important property that needs to be analyzed. In this paper, we study data remanence in modern FPGAs using a custom 90nm FPGA designed for this test. The effects of temperatures, architecture, memory topology, and power off methods are analyzed. We find that different memory cells in the FPGA architecture have different remanence properties depending on their circuit design, data content, leakage and supply noise. To our knowledge, this is the first study of data remanence in FPGAs and in deep-submicron ICs.","PeriodicalId":130106,"journal":{"name":"2007 IEEE Custom Integrated Circuits Conference","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":"{\"title\":\"Analysis of Data Remanence in a 90nm FPGA\",\"authors\":\"Tim Tuan, T. Strader, S. Trimberger\",\"doi\":\"10.1109/CICC.2007.4405689\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"FPGAs are increasingly used in military applications, the security of a design when the part is powered off is an important property that needs to be analyzed. In this paper, we study data remanence in modern FPGAs using a custom 90nm FPGA designed for this test. The effects of temperatures, architecture, memory topology, and power off methods are analyzed. We find that different memory cells in the FPGA architecture have different remanence properties depending on their circuit design, data content, leakage and supply noise. To our knowledge, this is the first study of data remanence in FPGAs and in deep-submicron ICs.\",\"PeriodicalId\":130106,\"journal\":{\"name\":\"2007 IEEE Custom Integrated Circuits Conference\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"19\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2007.4405689\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2007.4405689","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
FPGAs are increasingly used in military applications, the security of a design when the part is powered off is an important property that needs to be analyzed. In this paper, we study data remanence in modern FPGAs using a custom 90nm FPGA designed for this test. The effects of temperatures, architecture, memory topology, and power off methods are analyzed. We find that different memory cells in the FPGA architecture have different remanence properties depending on their circuit design, data content, leakage and supply noise. To our knowledge, this is the first study of data remanence in FPGAs and in deep-submicron ICs.
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