基于径向基函数神经网络的分类加速器

M. Mohammadi, Rohit Ronge, J. Chandiramani, S. Nandy
{"title":"基于径向基函数神经网络的分类加速器","authors":"M. Mohammadi, Rohit Ronge, J. Chandiramani, S. Nandy","doi":"10.1109/SOCC.2015.7406928","DOIUrl":null,"url":null,"abstract":"A scalable and reconfigurable architecture for accelerating classification using Radial Basis Function Neural Network (RBFNN) is presented in this paper. The proposed accelerator comprises a set of interconnected HyperCells, which serve as the reconfigurable datapath on which the RBFNN is realized. The dimensions of RBFNN that can be supported on implemented design is limited due to the fixed number of HyperCells. To resolve this limitation, a folding strategy is discussed which provides a generic hardware solution for classification using RBFNN, with no constraint on the dimensions of inputs and outputs. The performance of RBFNN implemented on network of HyperCells using Xilinx Virtex 7 XC7V2000T as target FPGA is compared with software implementation and GPU implementation of RBFNN. Our results show speed up of 1.91X-15.94X over equivalent software implementation on Intel Core 2 Quad and 1.33X-14.6X over GPU (NVIDIA GTX650).","PeriodicalId":329464,"journal":{"name":"2015 28th IEEE International System-on-Chip Conference (SOCC)","volume":"112 8","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"An accelerator for classification using radial basis function neural network\",\"authors\":\"M. Mohammadi, Rohit Ronge, J. Chandiramani, S. Nandy\",\"doi\":\"10.1109/SOCC.2015.7406928\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A scalable and reconfigurable architecture for accelerating classification using Radial Basis Function Neural Network (RBFNN) is presented in this paper. The proposed accelerator comprises a set of interconnected HyperCells, which serve as the reconfigurable datapath on which the RBFNN is realized. The dimensions of RBFNN that can be supported on implemented design is limited due to the fixed number of HyperCells. To resolve this limitation, a folding strategy is discussed which provides a generic hardware solution for classification using RBFNN, with no constraint on the dimensions of inputs and outputs. The performance of RBFNN implemented on network of HyperCells using Xilinx Virtex 7 XC7V2000T as target FPGA is compared with software implementation and GPU implementation of RBFNN. Our results show speed up of 1.91X-15.94X over equivalent software implementation on Intel Core 2 Quad and 1.33X-14.6X over GPU (NVIDIA GTX650).\",\"PeriodicalId\":329464,\"journal\":{\"name\":\"2015 28th IEEE International System-on-Chip Conference (SOCC)\",\"volume\":\"112 8\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 28th IEEE International System-on-Chip Conference (SOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2015.7406928\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 28th IEEE International System-on-Chip Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2015.7406928","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

摘要

提出了一种可扩展、可重构的径向基函数神经网络(RBFNN)加速分类体系结构。该加速器由一组相互连接的hypercell组成,这些hypercell作为RBFNN实现的可重构数据路径。由于hypercell的数量固定,RBFNN在实现设计上可以支持的维度受到限制。为了解决这一限制,讨论了一种折叠策略,该策略提供了使用RBFNN进行分类的通用硬件解决方案,对输入和输出的维度没有约束。以Xilinx Virtex 7 XC7V2000T为目标FPGA,在HyperCells网络上实现了RBFNN,并将其性能与软件实现和GPU实现进行了比较。我们的结果显示,在英特尔酷睿2 Quad上实现的速度为1.91X-15.94X,在GPU (NVIDIA GTX650)上实现的速度为1.33X-14.6X。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An accelerator for classification using radial basis function neural network
A scalable and reconfigurable architecture for accelerating classification using Radial Basis Function Neural Network (RBFNN) is presented in this paper. The proposed accelerator comprises a set of interconnected HyperCells, which serve as the reconfigurable datapath on which the RBFNN is realized. The dimensions of RBFNN that can be supported on implemented design is limited due to the fixed number of HyperCells. To resolve this limitation, a folding strategy is discussed which provides a generic hardware solution for classification using RBFNN, with no constraint on the dimensions of inputs and outputs. The performance of RBFNN implemented on network of HyperCells using Xilinx Virtex 7 XC7V2000T as target FPGA is compared with software implementation and GPU implementation of RBFNN. Our results show speed up of 1.91X-15.94X over equivalent software implementation on Intel Core 2 Quad and 1.33X-14.6X over GPU (NVIDIA GTX650).
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信