H.264/AVC编码器设计的过程网络建模和系统级性能评估

H. K. Zrida, F. Chrif, M. Abid
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引用次数: 0

摘要

鉴于嵌入式系统的复杂性大大增加,在早期设计阶段,使用相对详细的时钟周期精确模拟器进行设计空间探索是不切实际的。目前,提高抽象层次被广泛认为是解决日益增加的系统复杂性和低设计效率之间差距的一种解决方案。为此,引入了几种系统级设计工具和方法来有效地探索异构信号处理系统的设计空间。在本文中,我们证明了SystemC方法在日益复杂的嵌入式媒体系统的高抽象级别上有效的系统建模和快速性能评估的有效性。为此,我们选择了一个非常复杂的媒体应用程序的系统级设计;H.264/AVC(高级视频编解码器)视频编码器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Process network modeling and system level performance evaluation for H.264/AVC encoder design
Given the substantially increasing complexity of embedded systems, the use of relatively detailed clock cycle-accurate simulators for the design-space exploration is impractical in the early design stages. Raising the abstraction level is nowadays widely seen as a solution to bridge the gap between the increasing system complexity and the low design productivity. For this, several system-level design tools and methodologies have been introduced to efficiently explore the design space of heterogeneous signal processing systems. In this paper, we demonstrate the effectiveness of the SystemC methodology for efficient system modeling and rapid performance evaluation at high abstraction level of an increasing complexity embedded media system. For this purpose, we have selected a system level design of a very high complexity media application; a H.264/AVC (Advanced Video Codec) video encoder.
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