CCSTG:一个有效的顺序电路测试模式发生器

Kyuchull Kim, K. Saluja
{"title":"CCSTG:一个有效的顺序电路测试模式发生器","authors":"Kyuchull Kim, K. Saluja","doi":"10.1109/VTEST.1993.313304","DOIUrl":null,"url":null,"abstract":"A simple method which combines the efficiencies of an event driven implication method and speed of a compiled code implication is proposed for use in a sequential test pattern generator. This method, in conjunction with several other concepts and heuristics, is used to implement a sequential test pattern generator CCSTG based on the sequential test generation algorithm used in FASTEST. It is shown that the performance of a sequential test pattern generator improves substantially when methods proposed in this paper are incorporated in a test pattern generator. The authors verified this assertion by comparing the performances of test pattern generators, with and without these features, for ISCAS-89 benchmark sequential circuits.<<ETX>>","PeriodicalId":283218,"journal":{"name":"Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium","volume":"266 ","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-04-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"CCSTG: an efficient test pattern generator for sequential circuits\",\"authors\":\"Kyuchull Kim, K. Saluja\",\"doi\":\"10.1109/VTEST.1993.313304\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A simple method which combines the efficiencies of an event driven implication method and speed of a compiled code implication is proposed for use in a sequential test pattern generator. This method, in conjunction with several other concepts and heuristics, is used to implement a sequential test pattern generator CCSTG based on the sequential test generation algorithm used in FASTEST. It is shown that the performance of a sequential test pattern generator improves substantially when methods proposed in this paper are incorporated in a test pattern generator. The authors verified this assertion by comparing the performances of test pattern generators, with and without these features, for ISCAS-89 benchmark sequential circuits.<<ETX>>\",\"PeriodicalId\":283218,\"journal\":{\"name\":\"Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium\",\"volume\":\"266 \",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-04-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTEST.1993.313304\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTEST.1993.313304","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

提出了一种简单的方法,它结合了事件驱动隐含方法的效率和编译代码隐含的速度,用于顺序测试模式生成器。该方法与其他几个概念和启发式方法相结合,用于实现基于FASTEST中使用的顺序测试生成算法的顺序测试模式生成器CCSTG。结果表明,将本文提出的方法应用于序列测试模式发生器后,序列测试模式发生器的性能得到了显著提高。作者通过比较ISCAS-89基准顺序电路中具有和不具有这些特性的测试模式生成器的性能来验证这一断言。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
CCSTG: an efficient test pattern generator for sequential circuits
A simple method which combines the efficiencies of an event driven implication method and speed of a compiled code implication is proposed for use in a sequential test pattern generator. This method, in conjunction with several other concepts and heuristics, is used to implement a sequential test pattern generator CCSTG based on the sequential test generation algorithm used in FASTEST. It is shown that the performance of a sequential test pattern generator improves substantially when methods proposed in this paper are incorporated in a test pattern generator. The authors verified this assertion by comparing the performances of test pattern generators, with and without these features, for ISCAS-89 benchmark sequential circuits.<>
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