几个基本VHDL概念的形式化模型

Proceedings of COMPASS'94 - 1994 IEEE 9th Annual Conference on Computer Assurance Pub Date : 1994-06-27 DOI:10.1109/CMPASS.1994.318454

D. Goldschlag

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引用次数: 4

摘要

本文提出了VHDL中几个基本概念的形式化模型，包括单个并发语句的语义、并发语句组、解析函数、增量延迟和分层组件结构。在此基础上，提出了对VHDL的几种扩展，包括不确定性赋值和无界异步。不确定性允许对环境和设备类别进行规范。这个模型很自然地反映了VHDL程序组成的意义。

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A formal model of several fundamental VHDL concepts

This paper presents a formal model of several fundamental concepts in VHDL including the semantics of individual concurrent statements, and groups of those statements, resolution functions, delta delays, and hierarchical component structuring. Based on this model, several extensions to VHDL are proposed including nondeterministic assignments and unbounded asynchrony. Nondeterminism allows the specification of environments and of classes of devices. This model naturally captures the meaning of composition of VHDL programs.<>

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Proceedings of COMPASS'94 - 1994 IEEE 9th Annual Conference on Computer Assurance

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