{"title":"用集成方法检查UML状态图的符号模型","authors":"Vitus S. W. Lam, J. Padget","doi":"10.1109/ECBS.2004.1316717","DOIUrl":null,"url":null,"abstract":"This paper puts forward a new approach for the specification and verification of finite state systems. The design of a system is first specified in UML statechart diagrams, then formalized in the /spl pi/calculus and finally verified automatically by NuSMV. We demonstrate an application of the proposed approach using the SET/A protocol as an example.","PeriodicalId":137219,"journal":{"name":"Proceedings. 11th IEEE International Conference and Workshop on the Engineering of Computer-Based Systems, 2004.","volume":"30 4","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"37","resultStr":"{\"title\":\"Symbolic model checking of UML statechart diagrams with an integrated approach\",\"authors\":\"Vitus S. W. Lam, J. Padget\",\"doi\":\"10.1109/ECBS.2004.1316717\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper puts forward a new approach for the specification and verification of finite state systems. The design of a system is first specified in UML statechart diagrams, then formalized in the /spl pi/calculus and finally verified automatically by NuSMV. We demonstrate an application of the proposed approach using the SET/A protocol as an example.\",\"PeriodicalId\":137219,\"journal\":{\"name\":\"Proceedings. 11th IEEE International Conference and Workshop on the Engineering of Computer-Based Systems, 2004.\",\"volume\":\"30 4\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-05-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"37\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. 11th IEEE International Conference and Workshop on the Engineering of Computer-Based Systems, 2004.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECBS.2004.1316717\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 11th IEEE International Conference and Workshop on the Engineering of Computer-Based Systems, 2004.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECBS.2004.1316717","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Symbolic model checking of UML statechart diagrams with an integrated approach
This paper puts forward a new approach for the specification and verification of finite state systems. The design of a system is first specified in UML statechart diagrams, then formalized in the /spl pi/calculus and finally verified automatically by NuSMV. We demonstrate an application of the proposed approach using the SET/A protocol as an example.