{"title":"10纳米以下CMOS器件面临的挑战","authors":"T. Mogami, H. Wakabayashi","doi":"10.1109/IWNC.2006.4570982","DOIUrl":null,"url":null,"abstract":"Scaling issues of nano-size MOSFETs will be discussed on the basis of sub-10 nm MOSFETs characteristics, which have been developed and confirmed switching characteristics. Understanding device limitations and developing new breakthrough technologies should be required to challenge sub-10-nm CMOS devices.","PeriodicalId":356139,"journal":{"name":"2006 International Workshop on Nano CMOS","volume":"77 5‐6","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Challenges for sub-10 nm CMOS devices\",\"authors\":\"T. Mogami, H. Wakabayashi\",\"doi\":\"10.1109/IWNC.2006.4570982\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Scaling issues of nano-size MOSFETs will be discussed on the basis of sub-10 nm MOSFETs characteristics, which have been developed and confirmed switching characteristics. Understanding device limitations and developing new breakthrough technologies should be required to challenge sub-10-nm CMOS devices.\",\"PeriodicalId\":356139,\"journal\":{\"name\":\"2006 International Workshop on Nano CMOS\",\"volume\":\"77 5‐6\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 International Workshop on Nano CMOS\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWNC.2006.4570982\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 International Workshop on Nano CMOS","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWNC.2006.4570982","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Scaling issues of nano-size MOSFETs will be discussed on the basis of sub-10 nm MOSFETs characteristics, which have been developed and confirmed switching characteristics. Understanding device limitations and developing new breakthrough technologies should be required to challenge sub-10-nm CMOS devices.
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