{"title":"温度对负电容场效应管的影响:TCAD仿真研究","authors":"Yash Pathak, Rashi Mann, B. Malhotra, R. Chaujar","doi":"10.1109/DELCON57910.2023.10127565","DOIUrl":null,"url":null,"abstract":"In this simulation study, the comparative study of modified Negative Capacitance FET (NCFET) with a spacer and conventional NCFET (without spacer) is taken into account with their hybrid parameters. Modified NCFET is Metal-ferroelectric-metal-insulator-metal-oxide-semiconductor (MFMIMOS) FET (with spacer) in the way of layering at gate stack with a high-K dielectric substrate region. The conductivity of the channel is controlled by applied gate voltage (Vgs). The study includes the architecture of both NCFET and their parameter comparison like the drain current (ID), threshold voltage (Vth), etc. Further, the temperature analysis was done at temperature range of 300 K, 400 K and 500 K for the modified MFMIMOS (MFMIMOS with spacer) structure. All the simulation are carried out on the visual TCAD simulator and from the analysis we found that the off - state current (IOFF) is reduced with decrease in temperature for modified MFMIMOS, which results in higher switching ratio (ION /IOFF) and enhanced threshold voltage (Vth) when we move from 500 K to 300 K.","PeriodicalId":193577,"journal":{"name":"2023 2nd Edition of IEEE Delhi Section Flagship Conference (DELCON)","volume":"27 11","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-02-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Impact of Temperature on Negative Capacitance FET: A TCAD Simulation Study\",\"authors\":\"Yash Pathak, Rashi Mann, B. Malhotra, R. Chaujar\",\"doi\":\"10.1109/DELCON57910.2023.10127565\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this simulation study, the comparative study of modified Negative Capacitance FET (NCFET) with a spacer and conventional NCFET (without spacer) is taken into account with their hybrid parameters. Modified NCFET is Metal-ferroelectric-metal-insulator-metal-oxide-semiconductor (MFMIMOS) FET (with spacer) in the way of layering at gate stack with a high-K dielectric substrate region. The conductivity of the channel is controlled by applied gate voltage (Vgs). The study includes the architecture of both NCFET and their parameter comparison like the drain current (ID), threshold voltage (Vth), etc. Further, the temperature analysis was done at temperature range of 300 K, 400 K and 500 K for the modified MFMIMOS (MFMIMOS with spacer) structure. All the simulation are carried out on the visual TCAD simulator and from the analysis we found that the off - state current (IOFF) is reduced with decrease in temperature for modified MFMIMOS, which results in higher switching ratio (ION /IOFF) and enhanced threshold voltage (Vth) when we move from 500 K to 300 K.\",\"PeriodicalId\":193577,\"journal\":{\"name\":\"2023 2nd Edition of IEEE Delhi Section Flagship Conference (DELCON)\",\"volume\":\"27 11\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-02-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 2nd Edition of IEEE Delhi Section Flagship Conference (DELCON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DELCON57910.2023.10127565\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 2nd Edition of IEEE Delhi Section Flagship Conference (DELCON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DELCON57910.2023.10127565","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Impact of Temperature on Negative Capacitance FET: A TCAD Simulation Study
In this simulation study, the comparative study of modified Negative Capacitance FET (NCFET) with a spacer and conventional NCFET (without spacer) is taken into account with their hybrid parameters. Modified NCFET is Metal-ferroelectric-metal-insulator-metal-oxide-semiconductor (MFMIMOS) FET (with spacer) in the way of layering at gate stack with a high-K dielectric substrate region. The conductivity of the channel is controlled by applied gate voltage (Vgs). The study includes the architecture of both NCFET and their parameter comparison like the drain current (ID), threshold voltage (Vth), etc. Further, the temperature analysis was done at temperature range of 300 K, 400 K and 500 K for the modified MFMIMOS (MFMIMOS with spacer) structure. All the simulation are carried out on the visual TCAD simulator and from the analysis we found that the off - state current (IOFF) is reduced with decrease in temperature for modified MFMIMOS, which results in higher switching ratio (ION /IOFF) and enhanced threshold voltage (Vth) when we move from 500 K to 300 K.