{"title":"带有慢波匹配传输线的60 ghz CMOS下变频混频器","authors":"I. Lai, Y. Kambayashi, M. Fujishima","doi":"10.1109/ASSCC.2006.357884","DOIUrl":null,"url":null,"abstract":"A cascade CMOS mixer is fabricated to exploit the unlicensed band around 60 GHz. This topology avoids the need for area-consuming power combining and uses simple matching with slow-wave transmission lines (SWTL). SWTL has a higher quality factor and allows area reduction. The circuit is fabricated in standard digital 90-nm CMOS and has a radio frequency (RF) return-loss more than 10 dB between 46 GHz and 64 GHz. At RF of 60 GHz, intermediate frequency (IF) of 4 GHz and local oscillator (LO) power of 1.5 dBm, the conversion loss is 1.2 dB and an input-referred 1-dB compression point of 0.5 dBm was measured. The length reduction of the transmission lines achieved is 47% and the resulting chip occupies an area of 0.61 mm x 0.80 mm with comparable performance to other works.","PeriodicalId":142478,"journal":{"name":"2006 IEEE Asian Solid-State Circuits Conference","volume":"77 12","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"44","resultStr":"{\"title\":\"60-GHz CMOS Down-Conversion Mixer with Slow-Wave Matching Transmission Lines\",\"authors\":\"I. Lai, Y. Kambayashi, M. Fujishima\",\"doi\":\"10.1109/ASSCC.2006.357884\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A cascade CMOS mixer is fabricated to exploit the unlicensed band around 60 GHz. This topology avoids the need for area-consuming power combining and uses simple matching with slow-wave transmission lines (SWTL). SWTL has a higher quality factor and allows area reduction. The circuit is fabricated in standard digital 90-nm CMOS and has a radio frequency (RF) return-loss more than 10 dB between 46 GHz and 64 GHz. At RF of 60 GHz, intermediate frequency (IF) of 4 GHz and local oscillator (LO) power of 1.5 dBm, the conversion loss is 1.2 dB and an input-referred 1-dB compression point of 0.5 dBm was measured. The length reduction of the transmission lines achieved is 47% and the resulting chip occupies an area of 0.61 mm x 0.80 mm with comparable performance to other works.\",\"PeriodicalId\":142478,\"journal\":{\"name\":\"2006 IEEE Asian Solid-State Circuits Conference\",\"volume\":\"77 12\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"44\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE Asian Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASSCC.2006.357884\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2006.357884","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 44
摘要
制作了级联CMOS混频器来利用60 GHz左右的未授权频段。这种拓扑结构避免了占用面积的功率组合,并与慢波传输线(SWTL)进行简单匹配。SWTL具有更高的质量因子,并允许缩小面积。该电路采用标准的数字90纳米CMOS制造,在46 GHz和64 GHz之间的射频(RF)回波损耗大于10 dB。在RF为60 GHz,中频为4 GHz,本振功率为1.5 dBm时,转换损耗为1.2 dB,测量到输入参考1 dB压缩点为0.5 dBm。传输线长度减少了47%,芯片面积为0.61 mm x 0.80 mm,性能与其他产品相当。
60-GHz CMOS Down-Conversion Mixer with Slow-Wave Matching Transmission Lines
A cascade CMOS mixer is fabricated to exploit the unlicensed band around 60 GHz. This topology avoids the need for area-consuming power combining and uses simple matching with slow-wave transmission lines (SWTL). SWTL has a higher quality factor and allows area reduction. The circuit is fabricated in standard digital 90-nm CMOS and has a radio frequency (RF) return-loss more than 10 dB between 46 GHz and 64 GHz. At RF of 60 GHz, intermediate frequency (IF) of 4 GHz and local oscillator (LO) power of 1.5 dBm, the conversion loss is 1.2 dB and an input-referred 1-dB compression point of 0.5 dBm was measured. The length reduction of the transmission lines achieved is 47% and the resulting chip occupies an area of 0.61 mm x 0.80 mm with comparable performance to other works.