数字电路合成的多值逻辑代数

Milton E. R. Romero, E. M. Martins, R. Santos
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引用次数: 26

摘要

数字电路的综合和简化是在众所周知的两级逻辑开关代数中进行的。通过将表示域增加到B级,可以设计多值逻辑(MV逻辑)数字电路。这项工作提出了一个基于一组通用门的代数,这些门执行运算符,以允许合成和简化MV逻辑数字电路。本文主要讨论:生成代数;由扩展积项和的正则形式合成的函数的代数形式;二元性;以及电路简化程序。合成了组合电路和顺序电路,以证明代数的正确性。所提出的代数允许设计任何中压逻辑数字电路,利用来自二进制电路的知识,将其扩展到中压逻辑数字电路合成。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Multiple Valued Logic Algebra for the Synthesis of Digital Circuits
The synthesis and simplification of digital circuits are performed in the well known two level logic switching algebra. By increasing the representation domain to B levels it is possible to design Multiple-Valued Logic (MV Logic)digital circuits. This work proposes an algebra based on a universal set of gates which carry out operators to allow synthesis and simplification of MV Logic digital circuits. This paper addresses: the generated algebra; the algebraic form of the function to be synthesized based on the canonical form of the Sum Of Extended Product terms; the duality; and circuit simplification procedures. Combinatorial and sequential circuits are synthesized to demonstrate the correctness of the algebra. The proposed algebra allows designing any MV Logic digital circuit taking advantage of the knowledge coming from the binary circuits by extending it to the MV Logic digital circuit synthesis.
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