SOC设计空间探索中的芯片尺寸估算

{"title":"SOC设计空间探索中的芯片尺寸估算","authors":"H. Jeschke","doi":"10.1016/j.sysarc.2007.01.012","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":204190,"journal":{"name":"2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-07-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Chip Size Estimation for SOC Design Space Exploration\",\"authors\":\"H. Jeschke\",\"doi\":\"10.1016/j.sysarc.2007.01.012\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\",\"PeriodicalId\":204190,\"journal\":{\"name\":\"2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation\",\"volume\":\"8 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-07-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1016/j.sysarc.2007.01.012\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1016/j.sysarc.2007.01.012","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}