硬件加速渲染CSG和透明度

Michael Kelley, K. Gould, Brent Pease, S. Winner, Alex Yen
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引用次数: 46

摘要

本文介绍了在硬件三维加速器中实现精确渲染CSG和透明度的算法。该算法是基于硬件架构,执行前到后z排序着色;还描述了允许无限数量的z排序对象层的多通道算法。该多通道算法已与图像分割算法相结合,以提高效率,并提高由此产生的硬件实现的性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Hardware accelerated rendering of CSG and transparency
This paper describes algorithms for implementing accurate rendering of CSG and transparency in a hardware 3D accelerator. The algorithms are based on a hardware architecture which performs front-to-back Z-sorted shading; a multiple-pass algorithm which allows an unlimited number of Z-sorted object layers is also described. The multiple-pass algorithm has been combined with an image partitioning algorithm to improve efficiency, and to improve performance of the resulting hardware implementation.
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