ApproxQAM: High-Order QAM Demodulation Circuits with Approximate Arithmetic

Modern mobile communication systems utilize increased bandwidth to provide advanced network performance and connectivity, all while their most computationally-intensive functions must be accelerated within the limited power envelope of embedded devices. In this paper, we improve the circuit complexity and throughput of a key digital function in the baseband processing chain, namely the high-order QAM demodulation. In particular, we explore 4 different demodulation algorithms, we employ both floating- and fixed-point arithmetic, and we insert approximations in the arithmetic units. In terms of accuracy of our most prominent implementations, i.e., for 64-QAM, our designs deliver BER values ranging from 10−1 to 10−4 for SNR 0−14dB. In terms of FPGA resources on Xilinx ZCU106, these 64-QAM designs achieve up to 98% reduction in LUT utilization compared to the accurate floating-point model of the same algorithm, and up to 122% increase in operating frequency. When targeting demodulation with high levels of accuracy, i.e., almost zero BER degradation with respect to that of the original floating-point model, the prevailing solution is the Approximate LLR algorithm configured with fixed-point arithmetic and 8-bit truncation, providing 81% decrease in LUTs and 13% increase in frequency to sustain a throughput of 323 Msamples/second.