低功耗H.263视频编解码器专用于移动计算

Proceedings of 1997 International Symposium on Low Power Electronics and Design Pub Date : 1997-08-01 DOI:10.1145/263272.263288

M. H. Miki, G. Fujita, T. Onoye, I. Shirakawa

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引用次数: 4

摘要

介绍了一种用于低比特率视觉通信的低功耗H.263视频编解码器核心。许多复杂的架构已经被设计出来，不仅试图最小化总芯片面积，而且还试图将功耗降低到这样一个程度，即工作频率可以降低到15 MHz。因此，采用0.35 /spl mu/m的CMOS技术，将H.263视频编解码核心的整个编解码功能集成在6.54 mm/sup 2/的芯片面积内，单3.3 V电源的功耗为146.60 mW。

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Low-power H.263 video codec dedicated to mobile computing

A low-power H.263 video codec core dedicated to low bitrate visual communication is described. A number of sophisticated architectures have been devised by attempting not only to minimize the total chip area but also to reduce the power consumption to such an extent that the operation frequency can be slowed down to 15 MHz. As a result, the whole encoding and decoding facilities of an H.263 video codec core have been integrated in the die area of 6.54 mm/sup 2/ by means of a 0.35 /spl mu/m CMOS technology, with the dissipation of 146.60 mW from a single 3.3 V supply.

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Proceedings of 1997 International Symposium on Low Power Electronics and Design

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