{"title":"用于低功率射频接收机的超低功率900 MHz中频低噪声放大器","authors":"Aasish Boora, Bharatha Kumar Thangarasu, K. Yeo","doi":"10.1109/socc49529.2020.9524753","DOIUrl":null,"url":null,"abstract":"The recent advancement in biomedical and healthcare sectors shows that the portable ambulatory medical devices with very low power consumption play an important role in continuous monitoring and diagnosis of outpatients by mitigating undesired frequent replacing or recharging of power supply source. To aid this requirement, the fully integrated on-chip circuits should consume very little power without compromising on the overall system performance. In this paper, we present a novel ultra-low power dual-stage intermediate frequency low-noise amplifier (IF LNA) operating at 900 MHz designed in TSMC CMOS 40nm technology. The proposed LNA comprises two identical complementary input stages externally matched to 50 Ω at the load and source along with inter-stage matching. Simulation results of the circuit indicate unconditional stability with a power consumption of 112.9 µW from a 0.56 V supply, a noise figure of 4.66 dB, and a gain of 10.2 dB. The input-referred IP3 is around -17.2 dBm. This work aims to be incorporated in a fully integrated ultra-low-power (ULP) RF receiver in the 2.4 GHz ISM band.","PeriodicalId":114740,"journal":{"name":"2020 IEEE 33rd International System-on-Chip Conference (SOCC)","volume":"12 2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"An Ultra-Low Power 900 MHz Intermediate Frequency Low Noise Amplifier For Low-Power RF Receivers\",\"authors\":\"Aasish Boora, Bharatha Kumar Thangarasu, K. Yeo\",\"doi\":\"10.1109/socc49529.2020.9524753\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The recent advancement in biomedical and healthcare sectors shows that the portable ambulatory medical devices with very low power consumption play an important role in continuous monitoring and diagnosis of outpatients by mitigating undesired frequent replacing or recharging of power supply source. To aid this requirement, the fully integrated on-chip circuits should consume very little power without compromising on the overall system performance. In this paper, we present a novel ultra-low power dual-stage intermediate frequency low-noise amplifier (IF LNA) operating at 900 MHz designed in TSMC CMOS 40nm technology. The proposed LNA comprises two identical complementary input stages externally matched to 50 Ω at the load and source along with inter-stage matching. Simulation results of the circuit indicate unconditional stability with a power consumption of 112.9 µW from a 0.56 V supply, a noise figure of 4.66 dB, and a gain of 10.2 dB. The input-referred IP3 is around -17.2 dBm. This work aims to be incorporated in a fully integrated ultra-low-power (ULP) RF receiver in the 2.4 GHz ISM band.\",\"PeriodicalId\":114740,\"journal\":{\"name\":\"2020 IEEE 33rd International System-on-Chip Conference (SOCC)\",\"volume\":\"12 2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-09-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 33rd International System-on-Chip Conference (SOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/socc49529.2020.9524753\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 33rd International System-on-Chip Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/socc49529.2020.9524753","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An Ultra-Low Power 900 MHz Intermediate Frequency Low Noise Amplifier For Low-Power RF Receivers
The recent advancement in biomedical and healthcare sectors shows that the portable ambulatory medical devices with very low power consumption play an important role in continuous monitoring and diagnosis of outpatients by mitigating undesired frequent replacing or recharging of power supply source. To aid this requirement, the fully integrated on-chip circuits should consume very little power without compromising on the overall system performance. In this paper, we present a novel ultra-low power dual-stage intermediate frequency low-noise amplifier (IF LNA) operating at 900 MHz designed in TSMC CMOS 40nm technology. The proposed LNA comprises two identical complementary input stages externally matched to 50 Ω at the load and source along with inter-stage matching. Simulation results of the circuit indicate unconditional stability with a power consumption of 112.9 µW from a 0.56 V supply, a noise figure of 4.66 dB, and a gain of 10.2 dB. The input-referred IP3 is around -17.2 dBm. This work aims to be incorporated in a fully integrated ultra-low-power (ULP) RF receiver in the 2.4 GHz ISM band.