{"title":"基于java的高级OpenMP循环合成方法","authors":"Emna Kallel, Y. Aoudni, M. Abid","doi":"10.1109/SERA.2016.7516142","DOIUrl":null,"url":null,"abstract":"This paper presents an automatic VHDL code generation method based on the OpenMP parallel programming specification. In order to synthesize C code for loops into hardware, we applied the directives of OpenMP, which specifies portable implementations of shared memory parallel programs. The proposed design flow using this method is described and its implementation details are provided. Experimental results show that the generated vhdl code from OpenMP is competitive with optimized code.","PeriodicalId":412361,"journal":{"name":"2016 IEEE 14th International Conference on Software Engineering Research, Management and Applications (SERA)","volume":"415 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Java-based approach for high level OpenMP loops synthesis\",\"authors\":\"Emna Kallel, Y. Aoudni, M. Abid\",\"doi\":\"10.1109/SERA.2016.7516142\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an automatic VHDL code generation method based on the OpenMP parallel programming specification. In order to synthesize C code for loops into hardware, we applied the directives of OpenMP, which specifies portable implementations of shared memory parallel programs. The proposed design flow using this method is described and its implementation details are provided. Experimental results show that the generated vhdl code from OpenMP is competitive with optimized code.\",\"PeriodicalId\":412361,\"journal\":{\"name\":\"2016 IEEE 14th International Conference on Software Engineering Research, Management and Applications (SERA)\",\"volume\":\"415 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE 14th International Conference on Software Engineering Research, Management and Applications (SERA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SERA.2016.7516142\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 14th International Conference on Software Engineering Research, Management and Applications (SERA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SERA.2016.7516142","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Java-based approach for high level OpenMP loops synthesis
This paper presents an automatic VHDL code generation method based on the OpenMP parallel programming specification. In order to synthesize C code for loops into hardware, we applied the directives of OpenMP, which specifies portable implementations of shared memory parallel programs. The proposed design flow using this method is described and its implementation details are provided. Experimental results show that the generated vhdl code from OpenMP is competitive with optimized code.