Target-independent high-level microprogramming

We describe a system which allows high-level microprogramming without requiring programmer knowledge of the target architecture, depending instead on retargetable microcode generation and optimization. In the ideal system the code generation, microcode compaction, encoding and simulation are driven by a single description of the target microarchitecture. An initial implementation, which is now working for a real microprogrammable processor, demonstrates the feasibility of the key technologies.