Low-cost and accurate DAC linearity test with ultrafast segmented model identification of linearity errors and removal of measurement errors (uSMILE-ROME)

The Digital-to-Analog-Converter (DAC) is one of the fundamental components of Analog and Mixed-signal circuits. Static linearity testing of high resolution high performance DACs traditionally requires a long time and is very expensive. In this paper, a low-cost ultrafast method of testing DACs is presented. The method utilizes a low cost on-board measurement device for capturing the output of the DAC, instead of a precise digital voltmeter. By using a segmented non-parametric model for the DAC's INL curve and thus reducing the number of unknowns, the test time is drastically reduced. Additionally, the linearity requirement on the measurement device is significantly relaxed by removing its non-linearity. The combination of these two methods results in drastic reduction in linearity test cost for DACs.