过程表征中非常低电流的简单评估

Proceedings of the 1991 International Conference on Microelectronic Test Structures Pub Date : 1990-03-18 DOI:10.1109/ICMTS.1990.161719

P. Girard, P. Nouet, F. M. Roche

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引用次数: 4

摘要

提出了一种用于评价MOS工艺特性的极低电流的测试结构。该器件包括放大器和在芯片上实现并连接到漏电元件的偏置电压组。给出了其工作原理，并基于2 μ m CMOS工业技术进行了SPICE仿真，验证了其结构响应。由于这种结构，获得了强电流放大。因此，只需要一个经典的晶体管参数分析仪来评估fA范围内的电流

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Simple evaluation of very low currents in process characterization

A test structure dedicated to the evaluation of very low currents for MOS process characterization is presented. The device consists of an amplifier plus a bias voltage set implemented on the chip and connected to the leaky element. The principle is given, and SPICE simulations, based on 2- mu m CMOS industrial technology, show the structure response. Owing to this structure, a strong current amplification is obtained. Consequently, only a classical transistor parameter analyzer is required to evaluate currents in the fA range.<>

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Proceedings of the 1991 International Conference on Microelectronic Test Structures

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