加成结构合成与商用fpga的比较

International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. Pub Date : 2006-10-16 DOI:10.1109/DTIS.2006.1708664

M. A. Sacristán, Victoria Rodellar, Antonio Díaz

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引用次数: 1

摘要

本文描述了几种不同结构的加法器的综合行为:线性的，如纹波进位加法器，树形的，如进位前置加法器;数组，如前缀加法器;并在fpga上优化了底层逻辑。使用资源的结果和最终电路的总延迟分别与来自Xilinx和Altera制造商的商业系列VIRTEX4和STRATIX2进行比较

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Comparison of addition structures synthesis over commercial FPGAs

This paper describes the behavior of the synthesis of several adders with different structures: lineal, like ripple carry adder, tree, like carry look ahead; array, like prefix adders; and optimized low level logic over FPGAs. The results of used resources and total delay of the resulting circuit are compared over the commercial families VIRTEX4 and STRATIX2 from Xilinx and Altera manufacturers, respectively

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International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.

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