3GSps跟踪保持电路在0.18µm CMOS工艺

Tang Kai, Meng Qiao, Liu Haitao, Zhang Yi
{"title":"3GSps跟踪保持电路在0.18µm CMOS工艺","authors":"Tang Kai, Meng Qiao, Liu Haitao, Zhang Yi","doi":"10.1109/ATC.2011.6027496","DOIUrl":null,"url":null,"abstract":"High-speed CMOS Track-and-Hold (T&H) circuit is the key component in the high-speed Analog-to-Digital converter (ADC). It is difficult to implementation GSps T&H in 0.18µm CMOS because of the bandwidth limitation in the OPA. In this paper, a 3GSps open loop T&H circuit in 0.18µm CMOS technology is proposed. The distortions in track mode and injection charge error in the hold mode were analyzed. CMOS switch and a differential buffer are used to trade off the speed, accuracy and sensitivity. Simulation results show that setup time, aperture time, aperture error and voltage drop rate are 280ps, 23ps, less than 3ps and 0.9µV/µs respectively. The T&H can work up to 3GHz at 1.8V supply and it could be used in 3GSps flash ADC in 0.18µm CMOS process.","PeriodicalId":221905,"journal":{"name":"The 2011 International Conference on Advanced Technologies for Communications (ATC 2011)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"3GSps Track-and-Hold circuit in 0.18µm CMOS process\",\"authors\":\"Tang Kai, Meng Qiao, Liu Haitao, Zhang Yi\",\"doi\":\"10.1109/ATC.2011.6027496\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"High-speed CMOS Track-and-Hold (T&H) circuit is the key component in the high-speed Analog-to-Digital converter (ADC). It is difficult to implementation GSps T&H in 0.18µm CMOS because of the bandwidth limitation in the OPA. In this paper, a 3GSps open loop T&H circuit in 0.18µm CMOS technology is proposed. The distortions in track mode and injection charge error in the hold mode were analyzed. CMOS switch and a differential buffer are used to trade off the speed, accuracy and sensitivity. Simulation results show that setup time, aperture time, aperture error and voltage drop rate are 280ps, 23ps, less than 3ps and 0.9µV/µs respectively. The T&H can work up to 3GHz at 1.8V supply and it could be used in 3GSps flash ADC in 0.18µm CMOS process.\",\"PeriodicalId\":221905,\"journal\":{\"name\":\"The 2011 International Conference on Advanced Technologies for Communications (ATC 2011)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-09-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"The 2011 International Conference on Advanced Technologies for Communications (ATC 2011)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATC.2011.6027496\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 2011 International Conference on Advanced Technologies for Communications (ATC 2011)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATC.2011.6027496","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

高速CMOS跟踪保持电路是高速模数转换器(ADC)的关键元件。由于OPA的带宽限制,在0.18µm CMOS中很难实现GSps T&H。本文提出了一种采用0.18µm CMOS技术的3GSps开环温湿度电路。分析了跟踪模式下的畸变和保持模式下的注入量误差。CMOS开关和差分缓冲器用于权衡速度,精度和灵敏度。仿真结果表明,设置时间280ps,孔径时间23ps,孔径误差小于3ps,电压降率0.9 V/µs。T&H可在1.8V电源下工作至3GHz,可用于0.18µm CMOS工艺的3GSps闪存ADC。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
3GSps Track-and-Hold circuit in 0.18µm CMOS process
High-speed CMOS Track-and-Hold (T&H) circuit is the key component in the high-speed Analog-to-Digital converter (ADC). It is difficult to implementation GSps T&H in 0.18µm CMOS because of the bandwidth limitation in the OPA. In this paper, a 3GSps open loop T&H circuit in 0.18µm CMOS technology is proposed. The distortions in track mode and injection charge error in the hold mode were analyzed. CMOS switch and a differential buffer are used to trade off the speed, accuracy and sensitivity. Simulation results show that setup time, aperture time, aperture error and voltage drop rate are 280ps, 23ps, less than 3ps and 0.9µV/µs respectively. The T&H can work up to 3GHz at 1.8V supply and it could be used in 3GSps flash ADC in 0.18µm CMOS process.
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