Modelling and analysis of flexray protocol in VHDL

In an automotive industry, more complex functions are integrated to vehicles, this brings about the requirement for more quicker and dependable in-vehicle systems. These functions are controlled and monitored by different Electronic Control Units (ECU). Time-triggered protocols like Flexray have been making progress as the standard high-speed reliable communication in the automotive industry, marking a shift away from the event-triggered system access used in Controller Area Networks (CAN). Flexray offers superior flexibility, reliability and a high-speed communications protocol. It was devised by automotive manufacturers and semiconductor vendors. Flexray delivers fault tolerant communication and time triggered bus between various electronic devices for automotive applications. Flexray is protocol designed to provide large cluster of data to be exchanged in real time and with great dependability between ECUs, sensors and actuators. This work deals with Modelling and analysis of flexray protocol in VHDL language. Xilinx and Modelsim simulation tools are used to analyze the results. Further, FPGA can be utilized to attain the reconfigurable parallel design so that in automotive communication this system gets higher reliability and speed.