价值链上的可靠性-从芯片到电路板/系统

K. Pressel, Josef Moser
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引用次数: 0

摘要

微电子技术的主要趋势是朝着更高的系统集成度发展,从而在可接受的成本下提高产品的紧凑性和复杂性。本文概述了ECSEL JU项目iRel40的选定结果,该项目的最终目标是通过降低整个价值链的故障率来提高电子元件和系统的可靠性。我们首先提出了一个方面的发展,其中数字双胞胎应用于开发和设计一个最佳的组装和包装。然后,我们强调了预组装,智能数据处理在生产中的应用,以及材料和测试知识的重要性对提高可靠性的影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Reliability along the Value Chain – from Chip to Board/System
Major trend in Microelectronics is the move towards higher system integration driving increasing compactness and complexity and all at acceptable cost. This paper presents an overview on selected results from the ECSEL JU project iRel40 which has the ultimate goal of improving reliability of electronic components and systems by reducing failure rates along the entire value chain. We first present an aspect for development, where digital twins are applied to develop and design an optimum assembly and packaging. Then we highlight that preassembly, intelligent data handling applied in production, and the importance of material and testing knowhow have impact to improve reliability.
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