{"title":"采用新型相位检测技术的8-PSK超再生接收机","authors":"Rana Mirzalou, M. Wagdy","doi":"10.1109/ICENCO.2016.7856438","DOIUrl":null,"url":null,"abstract":"This paper presents a new 8-PSK Super Regenerative Receiver operating in 402–405 MHz MICS band. The proposed topology employs minimum components to design phase detection engine. The receiver utilizes a combined Low Noise Amplifier (LNA) and Super Regenerative Oscillator (SRO) for current reuse purpose and a digital phase detection engine that extracts modulated phase information, via Latches and D-Flip-flops. The receiver is designed and simulated in 130 nm CMOS process and the whole circuit's power consumption is 119µW for the input of −80dBm at the rate of 6 Mbps with Energy Per Bit of 19.8 pj/b.","PeriodicalId":332360,"journal":{"name":"2016 12th International Computer Engineering Conference (ICENCO)","volume":"99 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"An 8-PSK Super Regenerative Receiver with new phase detection technique\",\"authors\":\"Rana Mirzalou, M. Wagdy\",\"doi\":\"10.1109/ICENCO.2016.7856438\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new 8-PSK Super Regenerative Receiver operating in 402–405 MHz MICS band. The proposed topology employs minimum components to design phase detection engine. The receiver utilizes a combined Low Noise Amplifier (LNA) and Super Regenerative Oscillator (SRO) for current reuse purpose and a digital phase detection engine that extracts modulated phase information, via Latches and D-Flip-flops. The receiver is designed and simulated in 130 nm CMOS process and the whole circuit's power consumption is 119µW for the input of −80dBm at the rate of 6 Mbps with Energy Per Bit of 19.8 pj/b.\",\"PeriodicalId\":332360,\"journal\":{\"name\":\"2016 12th International Computer Engineering Conference (ICENCO)\",\"volume\":\"99 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 12th International Computer Engineering Conference (ICENCO)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICENCO.2016.7856438\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 12th International Computer Engineering Conference (ICENCO)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICENCO.2016.7856438","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An 8-PSK Super Regenerative Receiver with new phase detection technique
This paper presents a new 8-PSK Super Regenerative Receiver operating in 402–405 MHz MICS band. The proposed topology employs minimum components to design phase detection engine. The receiver utilizes a combined Low Noise Amplifier (LNA) and Super Regenerative Oscillator (SRO) for current reuse purpose and a digital phase detection engine that extracts modulated phase information, via Latches and D-Flip-flops. The receiver is designed and simulated in 130 nm CMOS process and the whole circuit's power consumption is 119µW for the input of −80dBm at the rate of 6 Mbps with Energy Per Bit of 19.8 pj/b.
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