ICCAD-2017 CAD大赛中多层标准单元的合法化和基准

Nima Karimpour Darav, Ismail Bustany, A. Kennings, Ravi Mamidi
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引用次数: 31

摘要

在先进的节点技术中,越来越多的多层单元占用多行(例如多比特寄存器),以实现低功耗和高性能。多层标准单元合法化不仅要消除单元之间的所有重叠,而且要通过施加最小的扰动来保持给定位置的质量,从而满足微妙而复杂的设计规则。此外,在最先进的设计中,该过程必须快速而稳健地处理大量的细胞。为此,我们定义了一个基于最大、平均单元移动、半周线长度(HPWL)以及合法化算法运行时间的评估指标。此外,我们还引入了一组基准,其中包括具有一定高度范围(1-4行高度)的多层单元。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
ICCAD-2017 CAD contest in multi-deck standard cell legalization and benchmarks
An increasing number of multi-deck cells occupying multiple rows (e.g. multi-bit registers) are used in advanced node technologies to achieve low power and high performance. The multi-deck standard cell legalization not only should remove all overlaps between cells but also should satisfy delicate and complicated design rules with preserving the quality of the given placement by applying the minimal perturbation. In addition, the process must be fast and robust to handle the sheer number of cells in the state-of-the-art designs. For this purpose, we have defined an evaluation metric based on maximum, average cell movements, and Half Perimeter Wire Length (HPWL) as well as runtime of the legalization algorithm. In addition, we have introduced a set of benchmarks that include multi-deck cells with a range of heights (1–4 row heights).
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