{"title":"一个Ku-FMCW太赫兹频率源","authors":"Xingwang Li, Ning Chen, Zhibo Zhang, Weichao Pi","doi":"10.1109/iccsn.2018.8488226","DOIUrl":null,"url":null,"abstract":"A design scheme and implementation of a Ku-Band Frequency Modulated Continuous Wave (FMCW) frequency source for THz is introduced in the paper. After program analysis, a hybrid system design of DDS and PLL is formed, using the phase-locked loop (PLL) chip HMC703 and the DDS chip AD9910. Through debugging the system, the frequency source output power is above 12 dBm, with spurious signals suppression of −45dBc and power flatness of ±1dB. In addition, the signal frequency of the system can be from minimum 17.1GHz to maximum 19.1GHz.","PeriodicalId":243383,"journal":{"name":"2018 10th International Conference on Communication Software and Networks (ICCSN)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Ku-FMCW Frequency Source for THz\",\"authors\":\"Xingwang Li, Ning Chen, Zhibo Zhang, Weichao Pi\",\"doi\":\"10.1109/iccsn.2018.8488226\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A design scheme and implementation of a Ku-Band Frequency Modulated Continuous Wave (FMCW) frequency source for THz is introduced in the paper. After program analysis, a hybrid system design of DDS and PLL is formed, using the phase-locked loop (PLL) chip HMC703 and the DDS chip AD9910. Through debugging the system, the frequency source output power is above 12 dBm, with spurious signals suppression of −45dBc and power flatness of ±1dB. In addition, the signal frequency of the system can be from minimum 17.1GHz to maximum 19.1GHz.\",\"PeriodicalId\":243383,\"journal\":{\"name\":\"2018 10th International Conference on Communication Software and Networks (ICCSN)\",\"volume\":\"62 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 10th International Conference on Communication Software and Networks (ICCSN)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/iccsn.2018.8488226\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 10th International Conference on Communication Software and Networks (ICCSN)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/iccsn.2018.8488226","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A design scheme and implementation of a Ku-Band Frequency Modulated Continuous Wave (FMCW) frequency source for THz is introduced in the paper. After program analysis, a hybrid system design of DDS and PLL is formed, using the phase-locked loop (PLL) chip HMC703 and the DDS chip AD9910. Through debugging the system, the frequency source output power is above 12 dBm, with spurious signals suppression of −45dBc and power flatness of ±1dB. In addition, the signal frequency of the system can be from minimum 17.1GHz to maximum 19.1GHz.